commit
0e819599e7
@ -0,0 +1,35 @@
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.syntax unified
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.cpu cortex-m0
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.thumb
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.text
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.align 2
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@ uint cpu_get_regs_and_sp(r0=uint regs[10])
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.global cpu_get_regs_and_sp
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.thumb
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.thumb_func
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.type cpu_get_regs_and_sp, %function
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cpu_get_regs_and_sp:
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@ store registers into given array
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str r4, [r0, #0]
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str r5, [r0, #4]
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str r6, [r0, #8]
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str r7, [r0, #12]
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push {r1}
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mov r1, r8
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str r1, [r0, #16]
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mov r1, r9
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str r1, [r0, #20]
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mov r1, r10
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str r1, [r0, #24]
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mov r1, r11
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str r1, [r0, #28]
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mov r1, r12
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str r1, [r0, #32]
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mov r1, r13
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str r1, [r0, #36]
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pop {r1}
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@ return the sp
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mov r0, sp
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bx lr
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@ -0,0 +1,27 @@
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.syntax unified
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.cpu cortex-m4
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.thumb
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.text
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.align 2
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@ uint cpu_get_regs_and_sp(r0=uint regs[10])
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.global cpu_get_regs_and_sp
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.thumb
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.thumb_func
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.type cpu_get_regs_and_sp, %function
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cpu_get_regs_and_sp:
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@ store registers into given array
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str r4, [r0], #4
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str r5, [r0], #4
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str r6, [r0], #4
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str r7, [r0], #4
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str r8, [r0], #4
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str r9, [r0], #4
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str r10, [r0], #4
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str r11, [r0], #4
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str r12, [r0], #4
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str r13, [r0], #4
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@ return the sp
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mov r0, sp
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bx lr
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@ -1,185 +0,0 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Glenn Ruben Bakke
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include "nrf.h"
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#include "mphalport.h"
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#include "hal_uart.h"
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#include "fifo.h"
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#include "lib/utils/interrupt_char.h"
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#ifdef HAL_UART_MODULE_ENABLED
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FIFO_DEF(_ff_uart, 128, uint8_t, true, UARTE0_UART0_IRQn);
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uint32_t hal_uart_baudrate_lookup[] = {
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UART_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud.
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UART_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud.
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UART_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud.
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UART_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud.
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UART_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud.
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UART_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud.
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UART_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud.
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UART_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud.
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UART_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud.
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UART_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud.
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UART_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud.
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UART_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud.
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UART_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud.
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UART_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud.
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UART_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud.
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UART_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud.
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};
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hal_uart_error_t hal_uart_char_write(NRF_UART_Type * p_instance, uint8_t ch) {
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p_instance->ERRORSRC = 0;
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p_instance->TXD = (uint8_t)ch;
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while (p_instance->EVENTS_TXDRDY != 1) {
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// Blocking wait.
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}
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// Clear the TX flag.
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p_instance->EVENTS_TXDRDY = 0;
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return p_instance->ERRORSRC;
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}
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hal_uart_error_t hal_uart_char_read(NRF_UART_Type * p_instance, uint8_t * ch) {
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while ( !fifo_read(_ff_uart, ch) ) {
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// wait for fifo data
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}
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return HAL_UART_ERROR_NONE;
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}
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hal_uart_error_t hal_uart_buffer_write(NRF_UART_Type * p_instance, uint8_t * p_buffer, uint32_t num_of_bytes, uart_complete_cb cb) {
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int i = 0;
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hal_uart_error_t err = 0;
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uint8_t ch = p_buffer[i++];
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while (i < num_of_bytes) {
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err = hal_uart_char_write(p_instance, ch);
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if (err) {
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return err;
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}
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ch = p_buffer[i++];
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}
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cb();
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return err;
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}
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hal_uart_error_t hal_uart_buffer_read(NRF_UART_Type * p_instance, uint8_t * p_buffer, uint32_t num_of_bytes, uart_complete_cb cb) {
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int i = 0;
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hal_uart_error_t err = 0;
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while (i < num_of_bytes) {
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hal_uart_error_t err = hal_uart_char_read(p_instance, &p_buffer[i]);
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if (err) {
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return err;
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}
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i++;
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}
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cb();
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return err;
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}
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int hal_uart_available(NRF_UART_Type * p_instance)
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{
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return fifo_count(_ff_uart);
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}
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void hal_uart_init(NRF_UART_Type * p_instance, hal_uart_init_t const * p_uart_init) {
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hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
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hal_gpio_cfg_pin(p_uart_init->rx_pin->port, p_uart_init->rx_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
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hal_gpio_pin_clear(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin);
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p_instance->PSELTXD = p_uart_init->tx_pin->pin;
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p_instance->PSELRXD = p_uart_init->rx_pin->pin;
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#if NRF52840_XXAA
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p_instance->PSELTXD |= (p_uart_init->tx_pin->port << UARTE_PSEL_TXD_PORT_Pos);
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p_instance->PSELRXD |= (p_uart_init->rx_pin->port << UARTE_PSEL_RXD_PORT_Pos);
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#endif
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if (p_uart_init->flow_control) {
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hal_gpio_cfg_pin(p_uart_init->rts_pin->port, p_uart_init->rts_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
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hal_gpio_cfg_pin(p_uart_init->cts_pin->port, p_uart_init->cts_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
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p_instance->PSELCTS = p_uart_init->cts_pin->pin;
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p_instance->PSELRTS = p_uart_init->rts_pin->pin;
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#if NRF52840_XXAA
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p_instance->PSELCTS |= (p_uart_init->cts_pin->port << UARTE_PSEL_CTS_PORT_Pos);
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p_instance->PSELRTS |= (p_uart_init->rts_pin->port << UARTE_PSEL_RTS_PORT_Pos);
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#endif
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p_instance->CONFIG = (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos);
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}
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p_instance->BAUDRATE = (hal_uart_baudrate_lookup[p_uart_init->baud_rate]);
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p_instance->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
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p_instance->EVENTS_TXDRDY = 0;
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p_instance->EVENTS_RXDRDY = 0;
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p_instance->TASKS_STARTTX = 1;
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p_instance->TASKS_STARTRX = 1;
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// Adafruit IRQ + fifo
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fifo_clear(_ff_uart);
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p_instance->INTENSET = UART_INTENSET_RXDRDY_Msk;
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NVIC_ClearPendingIRQ(p_uart_init->irq_num);
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NVIC_SetPriority(p_uart_init->irq_num, p_uart_init->irq_priority);
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NVIC_EnableIRQ(p_uart_init->irq_num);
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}
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bool hal_uart_inited(NRF_UART_Type * p_instance)
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{
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return !(p_instance->PSELTXD & (1 << 31)) && !(p_instance->PSELRXD & (1 << 31));
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}
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void UARTE0_UART0_IRQHandler(void)
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{
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NRF_UART_Type * p_instance = NRF_UART0;
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if (p_instance->EVENTS_RXDRDY)
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{
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uint8_t ch = (uint8_t) p_instance->RXD;
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// Keyboard interrupt
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if (mp_interrupt_char != -1 && ch == mp_interrupt_char)
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{
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mp_keyboard_interrupt();
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}else
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{
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fifo_write(_ff_uart, &ch);
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}
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p_instance->EVENTS_RXDRDY = 0x0UL;
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}
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}
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#endif // HAL_UART_MODULE_ENABLED
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@ -1,114 +0,0 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Glenn Ruben Bakke
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
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* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
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* THE SOFTWARE.
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*/
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#ifndef HAL_UART_H__
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#define HAL_UART_H__
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf.h"
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#define UART_HWCONTROL_NONE ((uint32_t)UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos)
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#define UART_HWCONTROL_RTS_CTS ((uint32_t)(UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos)
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#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
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(((CONTROL) == UART_HWCONTROL_NONE) || \
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((CONTROL) == UART_HWCONTROL_RTS_CTS))
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#ifdef HAL_UART_MODULE_ENABLED
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#define UART_BASE_POINTERS (const uint32_t[]){NRF_UART0_BASE}
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#define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn}
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#else // HAL_UARTE_MODULE_ENABLED
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#ifdef NRF52832_XXAA
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#define UART_BASE_POINTERS (const uint32_t[]){NRF_UARTE0_BASE}
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#define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn}
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#elif NRF52840_XXAA
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#define UART_BASE_POINTERS (const uint32_t[]){NRF_UARTE0_BASE, \
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NRF_UARTE1_BASE}
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#define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn, \
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UARTE1_IRQn}
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#endif // HAL_UARTE_MODULE_ENABLED
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#endif
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#define UART_BASE(x) ((NRF_UART_Type *)UART_BASE_POINTERS[x])
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#define UART_IRQ_NUM(x) (UART_IRQ_VALUES[x])
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typedef enum
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{
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HAL_UART_ERROR_NONE = 0x00, /*!< No error */
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HAL_UART_ERROR_ORE = 0x01, /*!< Overrun error. A start bit is received while the previous data still lies in RXD. (Previous data is lost.) */
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HAL_UART_ERROR_PE = 0x02, /*!< Parity error. A character with bad parity is received, if HW parity check is enabled. */
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HAL_UART_ERROR_FE = 0x04, /*!< Frame error. A valid stop bit is not detected on the serial data input after all bits in a character have been received. */
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HAL_UART_ERROR_BE = 0x08, /*!< Break error. The serial data input is '0' for longer than the length of a data frame. (The data frame length is 10 bits without parity bit, and 11 bits with parity bit.). */
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} hal_uart_error_t;
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typedef enum {
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HAL_UART_BAUD_1K2 = 0, /**< 1200 baud */
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HAL_UART_BAUD_2K4, /**< 2400 baud */
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HAL_UART_BAUD_4K8, /**< 4800 baud */
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HAL_UART_BAUD_9K6, /**< 9600 baud */
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HAL_UART_BAUD_14K4, /**< 14.4 kbaud */
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HAL_UART_BAUD_19K2, /**< 19.2 kbaud */
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HAL_UART_BAUD_28K8, /**< 28.8 kbaud */
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HAL_UART_BAUD_38K4, /**< 38.4 kbaud */
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HAL_UART_BAUD_57K6, /**< 57.6 kbaud */
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HAL_UART_BAUD_76K8, /**< 76.8 kbaud */
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HAL_UART_BAUD_115K2, /**< 115.2 kbaud */
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HAL_UART_BAUD_230K4, /**< 230.4 kbaud */
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HAL_UART_BAUD_250K0, /**< 250.0 kbaud */
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HAL_UART_BAUD_500K0, /**< 500.0 kbaud */
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HAL_UART_BAUD_1M0 /**< 1 mbaud */
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} hal_uart_baudrate_t;
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typedef struct {
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uint8_t id; /* UART instance id */
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const pin_obj_t * rx_pin; /* RX pin. */
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const pin_obj_t * tx_pin; /* TX pin. */
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const pin_obj_t * rts_pin; /* RTS pin, only used if flow control is enabled. */
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const pin_obj_t * cts_pin; /* CTS pin, only used if flow control is enabled. */
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bool flow_control; /* Flow control setting, if flow control is used, the system will use low power UART mode, based on CTS signal. */
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bool use_parity; /* Even parity if TRUE, no parity if FALSE. */
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uint32_t baud_rate; /* Baud rate configuration. */
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uint32_t irq_priority; /* UARTE IRQ priority. */
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uint32_t irq_num;
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} hal_uart_init_t;
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typedef struct
|
||||
{
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||||
NRF_UART_Type * p_instance; /* UART registers base address */
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||||
hal_uart_init_t init; /* UART communication parameters */
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} UART_HandleTypeDef;
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typedef void (*uart_complete_cb)(void);
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void hal_uart_init(NRF_UART_Type * p_instance, hal_uart_init_t const * p_uart_init);
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bool hal_uart_inited(NRF_UART_Type * p_instance);
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|
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hal_uart_error_t hal_uart_char_write(NRF_UART_Type * p_instance, uint8_t ch);
|
||||
|
||||
hal_uart_error_t hal_uart_char_read(NRF_UART_Type * p_instance, uint8_t * ch);
|
||||
int hal_uart_available(NRF_UART_Type * p_instance);
|
||||
|
||||
#endif // HAL_UART_H__
|
@ -0,0 +1,27 @@
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.thumb
|
||||
.text
|
||||
.align 2
|
||||
|
||||
@ uint cpu_get_regs_and_sp(r0=uint regs[10])
|
||||
.global cpu_get_regs_and_sp
|
||||
.thumb
|
||||
.thumb_func
|
||||
.type cpu_get_regs_and_sp, %function
|
||||
cpu_get_regs_and_sp:
|
||||
@ store registers into given array
|
||||
str r4, [r0], #4
|
||||
str r5, [r0], #4
|
||||
str r6, [r0], #4
|
||||
str r7, [r0], #4
|
||||
str r8, [r0], #4
|
||||
str r9, [r0], #4
|
||||
str r10, [r0], #4
|
||||
str r11, [r0], #4
|
||||
str r12, [r0], #4
|
||||
str r13, [r0], #4
|
||||
|
||||
@ return the sp
|
||||
mov r0, sp
|
||||
bx lr
|