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nearly feature-complete

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Signed-off-by: Sean Cross <sean@xobs.io>
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Sean Cross
2019-06-20 11:24:00 -07:00
parent ddee9849ca
commit edc98a5289
8 changed files with 81 additions and 7 deletions
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@@ -81,8 +81,8 @@
<div class="reveal">
<div class="footer">
<a class="url" href="https://p.xobs.io/td19/">p.xobs.io/td19</a>
<span class="theme">Teardown 2019</span><span class="hashtag"> | #teardown2019</span><span class="twitter"> |
@teardown</span>
<span class="theme">Teardown 2019</span><span class="hashtag"> | #teardown</span><span class="twitter"> |
@crowd_supply</span>
</div>
<div class="slides">
<section>
@@ -93,7 +93,7 @@
</p>
</section>
<section data-background-image="css/theme/lca2019-title-bg-transparent.svg">
<section data-background-image="css/theme/teardown2019-title-bg-transparent.svg">
<h1>Fomu: An FPGA in your USB Port</h1>
<h4>A whirlwind introduction to Fomu; a workshop in three levels</h4>
<p align="right">
@@ -348,7 +348,12 @@
</p> -->
</section>
<section>
<section>
<h2>Misleading Datasheets</h2>
<img data-src="img/xtal-datasheet-icon.jpg" alt="Footprint from Crystal">
</section>
<section>
<h2>What modifications does it have?</h2>
<ul>
<li>Shorting out two zero-ohm resistors (R7, PU)</li>
@@ -649,7 +654,73 @@ $ wishbone-tool --pid 0x5bf0 0x10000000
Value at 10000000: 12345678
$ </code></pre>
</section>
<section>
<h2>Adding Hardware</h2>
<img data-src="img/ice40-rgb.jpg" alt="Schematic of RGB block">
</section>
<section>
<h2>Technology Library Reference</h2>
<pre><code class="verilog">// Verilog Instantiation
SB_RGBA_DRV RGBA_DRIVER (
.CURREN(ENABLE_CURR),
.RGBLEDEN(ENABLE_RGBDRV),
.RGB0PWM(RGB0),
.RGB1PWM(RGB1),
.RGB2PWM(RGB2),
.RGB0(LED0),
.RGB1(LED1),
.RGB2(LED2)
);
defparam RGBA_DRIVER.CURRENT_MODE = "0b0";
defparam RGBA_DRIVER.RGB0_CURRENT = "0b111111";
defparam RGBA_DRIVER.RGB1_CURRENT = "0b111111" ;
defparam RGBA_DRIVER.RGB2_CURRENT = "0b111111";</code></pre>
<p>SBTICETechnologyLibrary201504.pdf page 147</p>
</section>
<section>
<h2>RGB Block</h2>
<pre><code class="python" style="font-size: 18px; line-height: 22px">class FomuRGB(Module, AutoCSR):
def __init__(self, pads):
self.output = CSRStorage(3)
self.specials += Instance("SB_RGBA_DRV",
i_CURREN = 0b1,
i_RGBLEDEN = 0b1,
i_RGB0PWM = self.output.storage[0],
i_RGB1PWM = self.output.storage[1],
i_RGB2PWM = self.output.storage[2],
o_RGB0 = pads.r,
o_RGB1 = pads.g,
o_RGB2 = pads.b,
p_CURRENT_MODE = "0b1",
p_RGB0_CURRENT = "0b000011",
p_RGB1_CURRENT = "0b000011",
p_RGB2_CURRENT = "0b000011",
)</code></pre>
</section>
<section>
<h2>Instantiating FomuRGB</h2>
<pre><code class="diff">@@ -55,6 +75,10 @@ class BaseSoC(SoCCore):
with_ctrl=False,
**kwargs)
+ # Add the LED driver block
+ led_pads = platform.request("rgb_led")
+ self.submodules.rgb = FomuRGB(led_pads)
+
# UP5K has single port RAM....
# Use this as CPU RAM.
spram_size = 128*1024</code></pre>
</section>
<section>
<h2>Interacting with the CSR</h2>
<pre><code>csr_register,rgb_output,0xe0006800,1,rw</code></pre>
<p>From <code>test/csr.csv</code></p>
</section>
<section>
<h2>VexRiscv</h2>
</section>