index: add some notes

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2019-08-19 15:26:38 +08:00
parent a01702f0dc
commit 40f22ea04e

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@ -42,32 +42,32 @@
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}
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@ -80,14 +80,18 @@
<!-- Start of main presentation -->
<div class="reveal">
<div class="footer">
<div class="url">Slides: <a href="https://p.xobs.io/camp19/">p.xobs.io/camp</a> &nbsp; Software: <a href="https://fomu.im/camp19">fomu.im/camp19</a></div>
<div class="url">Slides: <a href="https://p.xobs.io/camp19/">p.xobs.io/camp19</a> &nbsp; Software: <a
href="https://fomu.im/camp19">fomu.im/camp19</a></div>
<span class="theme">CCC Camp 2019</span><span class="hashtag"> | #CCCamp</span><span class="twitter"> |
@tomu_im</span>
</div>
<div class="slides">
<section>
<p>
Download Software from <a href="https://fomu.im/camp19">fomu.im/camp19</a>
Software is available on the USB drive marked "Fomu Workshop"
</p>
<p>
Or, download software from <a href="https://fomu.im/camp19">fomu.im/camp19</a>
</p>
</section>
@ -95,7 +99,8 @@
<h1>Fomu: An FPGA in your USB Port</h1>
<h4>A whirlwind introduction to Fomu; a workshop in three levels</h4>
<p align="right">
<small>Sean Cross - <a href="https://xobs.io/">https://xobs.io/</a> - @xobs</small>
<small>Sean "xobs" Cross - <a href="https://xobs.io/">https://xobs.io/</a> - @xobs</small>
<small>Tim "mithro" Ansell - <a href="https://github.com/timvideos/litex-buildenv/wiki/">https://github.com/timvideos/litex-buildenv/wiki/</a> - @mithro</small>
</p>
</section>
@ -109,6 +114,11 @@
<li>FPGA / HDL</li>
</ol>
</p>
<aside class="notes">
The overarching idea behind Fomu is to take a top-down approach to hardware design. Start at
something familiar, such as Python, and keep drilling down until you are no longer interested in
going further.
</aside>
</section>
<section>
@ -118,6 +128,10 @@
<li>What is an FPGA, and what is Fomu?</li>
<li>Working with Fomu using Python, RISC-V, and HDL</li>
</ol>
<aside class="notes">
Broadly, this workshop will cover three parts: What do you need to get started with Fomu, what is an
FPGA and why is Fomu special, and finally how to work with Fomu at three different levels.
</aside>
</section>
<section>
@ -130,6 +144,11 @@
<li>FPGA Toolchain</li>
<li>Python 3</li>
</ol>
<aside class="notes">
You require all of the software on this list. This software is provided on the USB drive that's
provided, or you can get them from <a
href="https://github.com/im-tomu/fomu-toolchain/releases">https://github.com/im-tomu/fomu-toolchain/releases</a>.
</aside>
</section>
</section>
@ -137,14 +156,15 @@
<section>
<h2>What is an FPGA?</h2>
<img data-src="img/ice40-lut.png" alt="SB_LUT4">
<!--
<p>
An FPGA is a chip that executes logic.
</p>
<p>
FPGAs are measured in resources called LUTs or LCs.
</p>
-->
<aside clas="notes">
An FPGA is an array of gates that's field-programmable. A more useful definition might be "a
chip you can reconfigure". Most chips are collections of transistors that take two inputs and
have one output. FPGAs have collections of transistors that look like this -- they take multiple
inputs and produce multiple outputs. On Fomu, the basic building block is a 4-input 1-output
lookup table called an "LC4". These are so important to FPGAs that the part number usually
contains how many LUTs there are. The Fomu has a UP5K, which has about 5000 LUTs. The NeTV had
an LX9, which had 9000 LUTs. The NeTV2 has an XC7A35T, which has 35000 LUTs.
</aside>
</section>
<section>
@ -265,6 +285,13 @@
<td>?</td>
</tr>
</table>
<aside class="notes">
A LUT is a lookup table. The value of the output depends on the value of all the inputs. You can
make arbitrary boolean logic here. For example, we could make a LUT that performs the logical
AND of all the inputs, and set it so that it only outputs a "1" if all of the inputs are 1. Or
we can make a NAND gate by taking the inverse. Each one of those 5000 LUTs in Fomu has a truth
table like this that it evaluates in real time.
</aside>
</section>
<section>
@ -280,6 +307,11 @@
endmodule
</code></pre>
<img class="fragment" data-src="img/verilog-synthesis.png" alt="Verilog Synthesis">
<aside class="notes">
It gets really tedious to be thinking about lookup tables all the time, so humans created programming languages to do it for them. This is an example of Verilog code. It makes a simple counter that outputs the xor of some values.
In order to turn this Verilog code into actual LUTs, we run it through a synthesizer. Much like how a compiler turns programming language into CPU opcodes, a synthesizer turns Verilog code into lookup tables
</aside>
</section>
<section>
@ -533,7 +565,7 @@ $ dfu-util -D new-image.dfu # Load new program</code></pre>
#define CSR_VERSION_GITEXTRA_ADDR 0xe000701c
#define CSR_VERSION_GITEXTRA_SIZE 2
</code></pre>
Excerpt from <code>csr.h</code>
Excerpt from <code>csr.h</code>
</section>
<section>
@ -697,7 +729,7 @@ defparam RGBA_DRIVER.CURRENT_MODE = "0b0";
defparam RGBA_DRIVER.RGB0_CURRENT = "0b111111";
defparam RGBA_DRIVER.RGB1_CURRENT = "0b111111" ;
defparam RGBA_DRIVER.RGB2_CURRENT = "0b111111";</code></pre>
<p>SBTICETechnologyLibrary201504.pdf page 147</p>
<p>SBTICETechnologyLibrary201504.pdf page 147</p>
</section>
<section>
<h2>RGB Block</h2>