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rework svd sections

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Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2023-08-15 18:52:16 +02:00
parent 91387f1de0
commit 3a027df990
1 changed files with 18 additions and 4 deletions
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@ -331,10 +331,26 @@ namespace Antmicro.Renode.Peripherals.UART {
</section> </section>
<section> <section>
<h2>Add a serial port</h2> <h2>Add a serial port</h2>
<code><pre> <pre><code>
{0x00, new DoubleWordRegister(this) {0x00, new DoubleWordRegister(this)
.WithValueField(0, 8, .WithValueField(0, 8,
writeCallback: (_, v) => TransmitCharacter((byte)v))}</code></code> writeCallback: (_, v) => TransmitCharacter((byte)v))}</code></pre>
</section>
<section>
<h2>Add a platform file</h2>
<pre><code>cpu1: CPU.Xtensa @ sysbus
cpuId: 1
cpuType: "esp32s3"
dram: Memory.MappedMemory @ sysbus 0x3FC88000
size: 0x78000
irom: Memory.MappedMemory @ sysbus 0x3FF00000
size: 0x20000
drom: Memory.MappedMemory @ sysbus 0x40000000
size: 0x60000
iram: Memory.MappedMemory @ sysbus 0x40370000
size: 0x70000
uart0: UART.ESP32_UART @ sysbus 0x60000000
</code></pre>
</section> </section>
<section> <section>
<img data-src="img/esp32s3-uart.png"> <img data-src="img/esp32s3-uart.png">
@ -357,8 +373,6 @@ namespace Antmicro.Renode.Peripherals.UART {
<section> <section>
<h2>Load SVD file</h2> <h2>Load SVD file</h2>
<pre><code style="word-wrap: break-word;"> <pre><code style="word-wrap: break-word;">
extmem: Unhandled read from offset 0x64.
extmem: Unhandled write to offset 0x64, value 0x3.
sysbus: Read from an unimplemented register SYSTEM:SYSCLK_CONF sysbus: Read from an unimplemented register SYSTEM:SYSCLK_CONF
(0x600C0060), returning a value from SVD: 0x1. (3) (0x600C0060), returning a value from SVD: 0x1. (3)
sysbus: Read from an unimplemented register SYSTEM:PERIP_CLK_EN0 sysbus: Read from an unimplemented register SYSTEM:PERIP_CLK_EN0